The present invention generally relates to power management of a processor. More specifically, the present invention relates to systems and methods for process and user driven dynamic voltage and frequency scaling.
Current systems utilize numerous power-reduction techniques in circuits, architectures, and operating systems (OS). Energy consumption has traditionally been one of the primary design criteria for mobile systems, for example, because of the effect of energy consumption on battery life. In line-powered systems, on the other hand, energy consumption is important due to its impact on power dissipation, which affects cost and noise. As more transistors are packed into a given area, the power density increases, and as a result, the chip temperature during execution is elevated, affecting performance, reliability, and integrated circuit (IC) lifetime.
Dynamic Voltage and Frequency Scaling (DVFS) is a typical power reduction technique in high-performance processors. DVFS varies the frequency and voltage of a processor in real-time according to processing needs. Although there are different versions of DVFS, at its core DVFS adapts power consumption and performance to the current workload of the CPU. Specifically, existing DVFS techniques in high-performance processors select an operating point (CPU frequency and voltage) based on the utilization of the processor.
While the approach of selecting an operating point based on utilization integrates OS-level control, such control is pessimistic. That is, existing DVFS techniques are pessimistic about both the CPU and the user.
With respect to the CPU, current DVFS techniques assume worst-case manufacturing process variation and operating temperature by basing their policies on loose, worst-case bounds given by the processor manufacturer. For example, a voltage level for a given frequency is set such that all manufactured processors in that generation are guaranteed to work under worst-case assumptions, such as highest temperature and process variation.
With respect to the user, current DVFS techniques ignore the user, and instead assume that CPU utilization is a sufficient proxy. For example, a high CPU utilization simply leads to a high frequency and high voltage, regardless of the user's satisfaction or expectation of performance. Some DVFS algorithms use task information, such as measured response times in interactive applications as a proxy for the user.